# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL

# ATT:   {vex} vpmadd52huq %ymm14, %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymm14
0xc4,0x42,0x95,0xb5,0xe6

# ATT:   {vex} vpmadd52huq %xmm14, %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmm14
0xc4,0x42,0x91,0xb5,0xe6

# ATT:   {vex} vpmadd52huq  268435456(%rbp,%r14,8), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0x22,0x95,0xb5,0xa4,0xf5,0x00,0x00,0x00,0x10

# ATT:   {vex} vpmadd52huq  291(%r8,%rax,4), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
0xc4,0x42,0x95,0xb5,0xa4,0x80,0x23,0x01,0x00,0x00

# ATT:   {vex} vpmadd52huq  (%rip), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [rip]
0xc4,0x62,0x95,0xb5,0x25,0x00,0x00,0x00,0x00

# ATT:   {vex} vpmadd52huq  -1024(,%rbp,2), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [2*rbp - 1024]
0xc4,0x62,0x95,0xb5,0x24,0x6d,0x00,0xfc,0xff,0xff

# ATT:   {vex} vpmadd52huq  4064(%rcx), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [rcx + 4064]
0xc4,0x62,0x95,0xb5,0xa1,0xe0,0x0f,0x00,0x00

# ATT:   {vex} vpmadd52huq  -4096(%rdx), %ymm13, %ymm12
# INTEL: {vex} vpmadd52huq ymm12, ymm13, ymmword ptr [rdx - 4096]
0xc4,0x62,0x95,0xb5,0xa2,0x00,0xf0,0xff,0xff

# ATT:   {vex} vpmadd52huq  268435456(%rbp,%r14,8), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0x22,0x91,0xb5,0xa4,0xf5,0x00,0x00,0x00,0x10

# ATT:   {vex} vpmadd52huq  291(%r8,%rax,4), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
0xc4,0x42,0x91,0xb5,0xa4,0x80,0x23,0x01,0x00,0x00

# ATT:   {vex} vpmadd52huq  (%rip), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [rip]
0xc4,0x62,0x91,0xb5,0x25,0x00,0x00,0x00,0x00

# ATT:   {vex} vpmadd52huq  -512(,%rbp,2), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [2*rbp - 512]
0xc4,0x62,0x91,0xb5,0x24,0x6d,0x00,0xfe,0xff,0xff

# ATT:   {vex} vpmadd52huq  2032(%rcx), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [rcx + 2032]
0xc4,0x62,0x91,0xb5,0xa1,0xf0,0x07,0x00,0x00

# ATT:   {vex} vpmadd52huq  -2048(%rdx), %xmm13, %xmm12
# INTEL: {vex} vpmadd52huq xmm12, xmm13, xmmword ptr [rdx - 2048]
0xc4,0x62,0x91,0xb5,0xa2,0x00,0xf8,0xff,0xff

# ATT:   {vex} vpmadd52luq %ymm14, %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymm14
0xc4,0x42,0x95,0xb4,0xe6

# ATT:   {vex} vpmadd52luq %xmm14, %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmm14
0xc4,0x42,0x91,0xb4,0xe6

# ATT:   {vex} vpmadd52luq  268435456(%rbp,%r14,8), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0x22,0x95,0xb4,0xa4,0xf5,0x00,0x00,0x00,0x10

# ATT:   {vex} vpmadd52luq  291(%r8,%rax,4), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
0xc4,0x42,0x95,0xb4,0xa4,0x80,0x23,0x01,0x00,0x00

# ATT:   {vex} vpmadd52luq  (%rip), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [rip]
0xc4,0x62,0x95,0xb4,0x25,0x00,0x00,0x00,0x00

# ATT:   {vex} vpmadd52luq  -1024(,%rbp,2), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [2*rbp - 1024]
0xc4,0x62,0x95,0xb4,0x24,0x6d,0x00,0xfc,0xff,0xff

# ATT:   {vex} vpmadd52luq  4064(%rcx), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [rcx + 4064]
0xc4,0x62,0x95,0xb4,0xa1,0xe0,0x0f,0x00,0x00

# ATT:   {vex} vpmadd52luq  -4096(%rdx), %ymm13, %ymm12
# INTEL: {vex} vpmadd52luq ymm12, ymm13, ymmword ptr [rdx - 4096]
0xc4,0x62,0x95,0xb4,0xa2,0x00,0xf0,0xff,0xff

# ATT:   {vex} vpmadd52luq  268435456(%rbp,%r14,8), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0x22,0x91,0xb4,0xa4,0xf5,0x00,0x00,0x00,0x10

# ATT:   {vex} vpmadd52luq  291(%r8,%rax,4), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
0xc4,0x42,0x91,0xb4,0xa4,0x80,0x23,0x01,0x00,0x00

# ATT:   {vex} vpmadd52luq  (%rip), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [rip]
0xc4,0x62,0x91,0xb4,0x25,0x00,0x00,0x00,0x00

# ATT:   {vex} vpmadd52luq  -512(,%rbp,2), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [2*rbp - 512]
0xc4,0x62,0x91,0xb4,0x24,0x6d,0x00,0xfe,0xff,0xff

# ATT:   {vex} vpmadd52luq  2032(%rcx), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [rcx + 2032]
0xc4,0x62,0x91,0xb4,0xa1,0xf0,0x07,0x00,0x00

# ATT:   {vex} vpmadd52luq  -2048(%rdx), %xmm13, %xmm12
# INTEL: {vex} vpmadd52luq xmm12, xmm13, xmmword ptr [rdx - 2048]
0xc4,0x62,0x91,0xb4,0xa2,0x00,0xf8,0xff,0xff

